Accelerator Functional Unit Developer Guide: Intel FPGA Programmable Acceleration Card N3000 Variants

ID 683190
Date 7/15/2022
Document Table of Contents

3.2.4. Internal Interfaces

The ccip_std_afu module has the following interfaces:
  1. Core Cache Interface (CCI-P) – This is an FPGA – Host PCIe* interface required for OPAE stack operation.
  2. Ethernet interface – This interface provides each Ethernet interface as individual or Multiplexed Avalon® streaming interface bus or buses.
  3. Local Memory – Each external memory has an Avalon® memory-mapped interface interface.
  4. PCIe* – Optional secondary PCIe* interface can be included if needed in your AFU for additional host – FPGA data transfer capability.

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