Intel® Stratix® 10 Device Family Pin Connection Guidelines

ID 683028
Date 4/03/2023
Document Table of Contents

Intel® Stratix® 10 P-Tile Pins

This section contains connection guidelines that are specific to the Intel® Stratix® 10 P-tile devices. The connection guidelines for the Intel® Stratix® 10 core pins are listed in the Intel® Stratix® 10 Core Pins section.
Note: You cannot change the P-tile IP for the PCI Express* ( PCIe* ) pin allocation in the Intel® Quartus® Prime project, but the P-tile IP for the PCIe* supports lane reversal and polarity inversion on the PCB.

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