Intel® Stratix® 10 Device Family Pin Connection Guidelines

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ID 683028
Date 6/25/2022
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Example 9— Intel® Stratix® 10 SX (–1V, –2V, and –3V parts) (only for the HF35 Package)

Table 43.  Power Supply Sharing Guidelines for Intel® Stratix® 10 SX (–1V, –2V, and –3V parts) (only for the HF35 Package) with Transceiver Data Rate <= 15 GbpsExample Requiring 7 Power Regulators
Power Pin Name Regulator Group Voltage Level (V) Supply Tolerance Power Source Regulator Sharing Notes
VCC 1

SmartVID

± 30mV Switcher (*) Share

Source VCC and VCCP from the same regulator, sharing the same voltage plane. You have the option to connect VCCL_HPS to the same regulator as VCC and VCCP when the power rails require the same voltage level. You may also connect the VCCPLLDIG_HPS power to the shared VCC, VCCP, and VCCL_HPS power planes with proper isolation filtering.

When implementing a filtered supply topology, you must consider the IR drop across the filter.

If you do not intend to utilize the HPS in the Intel® Stratix® 10 SX device, you must still provide power to the HPS power supply. Do not leave the VCCL_HPS and VCCPLLDIG_HPS floating or connect them to GND.

VCCP
VCCL_HPS
VCCPLLDIG_HPS Filter
VCCERAM 2 0.9 ± 30mV Switcher (*) Isolate

Connect the VCCERAM to a dedicated 0.9V power supply. You may connect the VCCPLLDIG_SDM power to the VCCERAM power plane with proper isolation filtering.

When implementing a filtered supply topology, you must consider the IR drop across the filter.

VCCPLLDIG_SDM Filter
VCCR_GXB[L,R] 3 1.03 ± 30mV Switcher (*) Share

You have the option to source the VCCR_GXB and VCCT_GXB from the same regulator when all the power rails require the same voltage level.

The VCCR_GXB and VCCT_GXB voltage supplies can vary depending on whether it is an L-tile or H-tile device as well as the channel configuration (non-bonded versus bonded channels) on each tile. For more information about the voltage requirement for your specific use case, refer to the Intel® Stratix® 10 Device Datasheet.

VCCT_GXB[L,R]
VCCPT 4 1.8 ± 5% (**) Switcher (*) Share if 1.8V

You may source VCCPT and VCCIO_SDM from the same regulator. You may connect the VCCIO, VCCIO3V, VCCIO_HPS, and VCCBAT to the same power plane if the those power rails are at the same voltage level. You may also connect the VCCH_GXB, VCCA_PLL, VCCPLL_SDM, VCCPLL_HPS, and VCCADC to the same power plane with proper isolation filtering. Depending on the regulator capabilities, you have the option to share this supply with multiple Intel® Stratix® 10 devices.

When implementing a filtered supply topology, you must consider the IR drop across the filter.

If you do not intend to utilize the HPS in the Intel® Stratix® 10 SX device, you must still provide power to the HPS power supply. Do not leave the VCCIO_HPS and VCCPLL_HPS floating or connect them to GND.

VCCIO_SDM 1.8
VCCIO Varies
VCCIO3V Varies
VCCIO_HPS 1.8
VCCBAT Varies
VCCH_GXB[L,R] 1.8 Filter
VCCA_PLL 1.8
VCCPLL_SDM 1.8
VCCPLL_HPS 1.8
VCCADC 1.8
VCCIO3D 5 1.8 ± 5% (**) Switcher (*) Isolate Connect VCCIO3D to a 1.8V power supply.
VCCFUSEWR_SDM 6 2.4 ± 50mV Switcher (*) Isolate Connect VCCFUSEWR_SDM to a dedicated 2.4V power supply if the SDM fuses need to be written. Leave VCCFUSEWR_SDM unconnected or tie it to VCCPT 1.8V power if the SDM fuses do not need to be written. Do not tie this pin to GND.
VCCIO3C 7 3.0V/3.3V ± 5% (**) Switcher (*) Isolate Connect VCCIO3C to a 3.0V or 3.3V power supply.

(*)When using a switcher to supply these voltages, the switcher must be a low noise switcher as defined as defined in note 7 of the Notes to Intel® Stratix® 10 Core Pins.

(**)The supported tolerance for the VCCIO power supply varies depending on the I/O standards. For more details, refer to the I/O standard specification in the Intel® Stratix® 10 Device Datasheet. Use the EPE (Early Power Estimator) and the Intel® Quartus® Prime Power Analyzer tool to assist in determining the power required for your specific design.

Each board design requires its own power analysis to determine the required power regulators needed to satisfy the specific board design requirements. An example block diagram using the Intel® Stratix® 10 SX device is provided in the following figure.

Figure 9. Example Power Supply Sharing Guidelines for Intel® Stratix® 10 SX (–1V, –2V, and –3V parts) (only for the HF35 Package) with Transceiver Data Rate <= 15 Gbps

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