Intel® Stratix® 10 Device Family Pin Connection Guidelines

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ID 683028
Date 6/25/2022
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Example 14— Intel® Stratix® 10 MX (–1V, –2V, and –3V parts)

Table 48.  Power Supply Sharing Guidelines for Intel® Stratix® 10 MX (–1V, –2V, and –3V parts) with 15 Gbps < Transceiver Data Rate <= 28.3 GbpsExample Requiring 9 Power Regulators
Power Pin Name Regulator Group Voltage Level (V) Supply Tolerance Power Source Regulator Sharing Notes
VCC 1

SmartVID

± 30mV Switcher (*) Share

Source VCC and VCCP from the same regulator, sharing the same voltage plane.

VCCP
VCCERAM 2 0.9 ± 30mV Switcher (*) Isolate

Connect the VCCERAM to a dedicated 0.9V power supply. You may connect the VCCPLLDIG_SDM power to the VCCERAM power plane with proper isolation filtering.

When implementing a filtered supply topology, you must consider the IR drop across the filter.

VCCPLLDIG_SDM Filter
VCCR_GXB[L,R] 3 1.12 ± 20mV Switcher (*) Isolate

Connect the VCCR_GXB to a dedicated 1.12V power supply.

The VCCR_GXB and VCCT_GXB voltage supplies can vary depending on whether it is an L-tile or H-tile device as well as the channel configuration (non-bonded versus bonded channels) on each tile. For more information about the voltage requirement for your specific use case, refer to the Intel® Stratix® 10 Device Datasheet.

VCCT_GXB[L,R] 4 1.12 ± 20mV Switcher (*) Isolate

Connect the VCCT_GXB to a dedicated 1.12V power supply.

The VCCR_GXB and VCCT_GXB voltage supplies can vary depending on whether it is an L-tile or H-tile device as well as the channel configuration (non-bonded versus bonded channels) on each tile. For more information about the voltage requirement for your specific use case, refer to the Intel® Stratix® 10 Device Datasheet.

VCCPT 5 1.8 ± 5% (**) Switcher (*) Share if 1.8V

You may source VCCPT and VCCBAT from the same regulator. You may connect the VCCH_GXB, VCCA_PLL, VCCPLL_SDM, and VCCADC to the same power plane with proper isolation filtering. Depending on the regulator capabilities, you have the option to share this supply with multiple Intel® Stratix® 10 devices.

When implementing a filtered supply topology, you must consider the IR drop across the filter.

VCCBAT Varies
VCCH_GXB[L,R] 1.8 Filter
VCCA_PLL 1.8
VCCPLL_SDM 1.8
VCCADC 1.8
VCCM_WORD_(BL,TL) 6 2.5 ± 100mV Switcher (*) Isolate Connect VCCM_WORD_(BL,TL) to a 2.5V power supply.
VCCIO_UIB_(BL,TL) 7 1.2 ± 30mV Switcher (*) Isolate Connect VCCIO_UIB_(BL,TL) to a 1.2V power supply.
VCCIO_SDM 8 1.8 ± 30mV Switcher (*) Share if 1.8V You may source VCCIO, VCCIO_SDM, and VCCIO3V from the same regulator if they are at the same 1.8V voltage level.
VCCIO Varies
VCCIO3V
VCCFUSEWR_SDM 9 2.4 ± 50mV Switcher (*) Isolate Connect VCCFUSEWR_SDM to a dedicated 2.4V power supply if the SDM fuses need to be written. Leave VCCFUSEWR_SDM unconnected or tie it to VCCPT 1.8V power if the SDM fuses do not need to be written. Do not tie this pin to GND.

(*)When using a switcher to supply these voltages, the switcher must be a low noise switcher as defined as defined in note 7 of the Notes to Intel® Stratix® 10 Core Pins.

(**)The supported tolerance for the VCCIO power supply varies depending on the I/O standards. For more details, refer to the I/O standard specification in the Intel® Stratix® 10 Device Datasheet. Use the EPE (Early Power Estimator) and the Intel® Quartus® Prime Power Analyzer tool to assist in determining the power required for your specific design.

Each board design requires its own power analysis to determine the required power regulators needed to satisfy the specific board design requirements. An example block diagram using the Intel® Stratix® 10 MX device is provided in the following figure.

Figure 14. Example Power Supply Sharing Guidelines for Intel® Stratix® 10 MX (–1V, –2V, and –3V parts) with 15 Gbps < Transceiver Data Rate <= 28.3 Gbps

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