Visible to Intel only — GUID: mha1538759380489
Ixiasoft
Visible to Intel only — GUID: mha1538759380489
Ixiasoft
Example 18— Intel® Stratix® 10 DX (–1V, –2V, and –3V parts)
Power Pin Name | Regulator Group | Voltage Level (V) | Supply Tolerance | Power Source | Regulator Sharing | Notes |
---|---|---|---|---|---|---|
VCC | 1 | SmartVID | ± 30mV | Switcher (*) | Share | Source VCC and VCCP from the same regulator, sharing the same voltage plane. You have the option to connect VCCL_HPS to the same regulator as VCC and VCCP when the power rails require the same voltage level. You may also connect the VCCPLLDIG_HPS power to the shared VCC, VCCP, and VCCL_HPS power planes with proper isolation filtering. When implementing a filtered supply topology, you must consider the IR drop across the filter. If you do not intend to utilize the HPS in the Intel® Stratix® 10 DX device, you must still provide power to the HPS power supply. Do not leave the VCCL_HPS and VCCPLLDIG_HPS floating or connect them to GND. |
VCCP | ||||||
VCCL_HPS | ||||||
VCCPLLDIG_HPS | Ferrite Bead Filter | |||||
VCCERAM | 2 | 0.9 | ± 30mV | Switcher (*) | Share | Connect VCCERAM and VCCFUSE_GXP to a dedicated 0.9V power supply. You may connect the VCCPLLDIG_SDM and VCCRT_GXP power to the shared VCCERAM and VCCFUSE_GXP power planes with proper isolation filtering. When implementing a filtered supply topology, you must consider the IR drop across the filter. |
VCCFUSE_GXP | ||||||
VCCRT_GXP | Ferrite Bead Filter | |||||
VCCPLLDIG_SDM | Ferrite Bead Filter | |||||
VCCRT_GXE | LC Filter | Connect the VCCRT_GXE to a dedicated 0.9V power supply. You may source VCCRT_GXE from VCCERAM through an LC filter. You may also source VCCRTPLL_GXE from the same regulator as VCCRT_GXE through a ferrite bead. When implementing a filtered supply topology, you must consider the IR drop across the filter. |
||||
VCCRTPLL_GXE | Ferrite Bead Filter | |||||
VCCH_GXE | 3 | 1.1 | ± 5% (**) | Switcher (*) | Isolate | Connect the VCCH_GXE to a dedicated 1.1V power supply. |
VCCPT | 4 | 1.8 | ± 5% (**) | Switcher (*) | Share if 1.8V | You can source VCCPT and VCCBAT from the same regulator, sharing the same voltage plane. You have the option to connect VCCA_PLL, VCCPLL_SDM, VCCPLL_HPS, VCCADC, and VCCCLK_GXP to the same power plane with proper isolation filtering. If you do not intend to utilize the HPS in the Intel® Stratix® 10 DX device, you must still provide power to the HPS power supply. Do not leave the VCCPLL_HPS floating or connect them to GND. When implementing a filtered supply topology you must consider the IR drop across the filter. |
VCCBAT | Varies | |||||
VCCA_PLL | 1.8 | Ferrite Bead Filter | ||||
VCCPLL_SDM | ||||||
VCCPLL_HPS | ||||||
VCCADC | ||||||
VCCCLK_GXP | ||||||
VCCH_GXP | 5 | 1.8 | ± 30mV | Switcher (*) | Ferrite Bead Filter | Connect VCCH_GXP to a dedicated 1.8V power supply. |
VCCM_WORD_(BL,TL) | 6 | 2.5 | ± 100mV | Switcher (*) | Isolate | Connect VCCM_WORD_(BL,TL) to a 2.5V power supply. |
VCCCLK_GXE | Ferrite Bead Filter | Connect VCCCLK_GXE to a dedicated 2.5V power supply. You have the option to share VCCCLK_GXE with VCCM_WORD if the VRM tolerance is ±100mV or better. When sharing, filter the VCCCLK_GXE with a ferrite bead. |
||||
VCCIO_UIB_(BL,TL) | 7 | 1.2 | ± 30mV | Switcher (*) | Isolate | Connect VCCIO_UIB_(BL,TL) to a 1.2V power supply. |
VCCFUSEWR_SDM | 8 | 2.4 | ± 50mV | Switcher (*) | Isolate | Connect VCCFUSEWR_SDM to a dedicated 2.4V power supply if the SDM fuses need to be written. Connect VCCFUSEWR_SDM to 1.8V power supply if the SDM fuses do not need to be written. Do not tie this pin to GND. |
VCCIO_SDM | 9 | 1.8 | ± 5% (**) | Switcher (*) | Share if 1.8V | You can source VCCIO_SDM, VCCIO_HPS, and VCCIO from the same regulator, if they are at the same 1.8V voltage level. If you do not intend to utilize the HPS in the Intel® Stratix® 10 DX device, you must still provide power to the HPS power supply. Do not leave the VCCIO_HPS floating or connect them to GND. |
VCCIO_HPS | ||||||
VCCIO | Varies |
(*)When using a switcher to supply these voltages, the switcher must be a low noise switcher as defined in note 7 of the Notes to Intel® Stratix® 10 Core Pins.
(**)The supported tolerance for the VCCIO power supply varies depending on the I/O standards. For more details, refer to the I/O standard specification in the Intel® Stratix® 10 Device Datasheet. Use the EPE (Early Power Estimator) and the Intel® Quartus® Prime Power Analyzer tool to assist in determining the power required for your specific design.
Each board design requires its own power analysis to determine the required power regulators needed to satisfy the specific board design requirements. An example block diagram using the Intel® Stratix® 10 DX device is provided in the following figure.
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