User Guide


CPU/FPGA Interaction Analysis

Use the CPU/FPGA Interaction analysis to assess the balance between CPU and FPGA in systems with FPGA hardware that run SYCL or OpenCL™ applications.
Use the CPU/FPGA Interaction analysis to assess FPGA performance of executed kernels, overall time for memory transfers between the CPU and FPGA, and wait time impact on CPU and FPGA workloads.
Intel® VTune™
collects these FPGA device metrics:
  • Global Bandwidth
  • Stalls
  • Occupancy
  • Activity
  • Idle

Configure and Run Analysis

Follow this procedure to configure options for the CPU/FPGA Interaction analysis:
  • To obtain device side information from the FPGA when profiling, make sure you specify the profile flag for the compile operation:
    To compile
    OpenCL Applications
    Intel® FPGA SDK for OpenCL™ Offline Compiler
    SYCL Applications
    Intel® oneAPI DPC++/C++ Compiler
    For other compiler options (exclusive to OpenCL profiling), see the FPGA Programming Guide.
  1. Click the (standalone GUI)/ (Visual Studio IDE)
    Configure Analysis
    button on the
    Intel® VTune™
    Configure Analysis
    window opens.
  2. In the
    • Specify the host executable in the
    • If applicable, specify arguments for the host application as
      Application parameters
      CPU/FPGA Interaction Analysis
  3. In the
    pane, click the Browse button.
    • Select
      CPU/FPGA Interaction
      analysis type from the
    • Enter the CPU sampling interval in milliseconds.
    • Specify if the collection should include CPU call stacks.
    • Specify a source for the FPGA profiling data:
      • OpenCL Profiling API
        - This source profiles only the host application.
      • AOCL Profiler
        - This source profiles the host application as well as the design on your FPGA.
    To generate the command line for this configuration, use the Command Line button.
  4. Click the Start button to run the analysis.

Import FPGA Data collected with Profiler Runtime Wrapper

If you collected FPGA profiling data with the Profiler Runtime Wrapper in the format of a
file, you can also import it to the VTune Profiler project.
To speed up the loading of the collected data, copy the
to an empty folder and import that folder instead of the entire compilation directory.
See the FPGA Optimization Guide for information on generating the profiling data with the Profiler Runtime Wrapper (oneAPI applications only).

View Data

The CPU/FPGA Interaction analysis results appear in the CPU/FPGA Interaction viewpoint. The viewpoint contains these windows:
  • The Summary window displays statistics on the overall application execution, identifying CPU time and processor utilization, and execution time for SYCL or OpenCL kernels. Double click a kernel in the Bottom-up view to see detailed performance data through the Source view.
  • The Bottom-up window displays functions in the Bottom-up tree, CPU time and CPU utilization per function. Click the functions or kernels in this view to see the Source view.
  • The Platform window displays over-time metric and performance data for SYCL or OpenCL kernels, memory transfers, CPU context switches, FPU utilization, and CPU threads with SYCL or OpenCL kernels.

What's Next

Use the CPU/FPGA Interaction viewpoint to review the following:
  • FPGA Utilization: Look at the
    FPGA Top Compute Tasks
    on the
    window for a list of kernels running on the FPGA. The
    window shows the Total and Average execution time for every kernel.
  • Memory Transfers: Look at the
    Data Transferred
    column on the
    window or the
    Computing Queue
    rows on the
    window to view SYCL or OpenCL kernels and memory transfers.
  • Workload Impact: The
    Context Switch Time
    metric on the
    window shows how much time was spent in CPU context switches. Context switches can also be seen on the
    tab as they occurred during application execution.

Product and Performance Information


Performance varies by use, configuration and other factors. Learn more at