AN 985: Nios® V Processor Tutorial

ID 784468
Date 5/15/2024
Document Table of Contents

1.2.3. Building Software Design with Ashling* RiscFree* IDE for Intel® FPGAs

After the processor system is ready, you may begin building the software design using Ashling* RiscFree* IDE for Intel® FPGAs software. It consists of the following steps:
  1. Create a board support package (BSP) project.
  2. Create a Nios® V processor application project with Hello World source code.
  3. Import both projects into RiscFree IDE’s workspace.
  4. Build the Hello World application.

To ensure a streamlined build flow, you are encouraged to create similar directory tree in your design project. The following software design flow is based on this directory tree.

To create the software project directory tree, follow these steps:
  1. In your design project folder, create a folder called software.
  2. In the software folder, create two folders called app and bsp
Figure 23. Software Project Directory Tree