AN 985: Nios® V Processor Tutorial

ID 784468
Date 8/18/2023
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1.3.3. Checking Simulation Files

At this point in the design flow, you have generated your system and created all the files necessary for simulation listed in the table below.
Table 2.  Simulation Files Generated
File Description
<Working directory>/niosv_top_tb/* Platform Designer generates a testbench system when you enable the Create testbench Platform Designer system option.
<Working directory>/niosv_top_tb/niosv_top_tb/sim/mentor/msim_setup.tcl Sets up a Questa simulation environment and creates alias commands to compile the required device libraries and system design files in the correct order and loads the top-level design for simulation.
<Working directory>/software/app/build/Debug/hello.hex Memory Initialization Files (.hex) is required to initialize memory components in your system.