Ethernet Subsystem Intel® FPGA IP User Guide: Early Access Customer Release

ID 773413
Date 4/14/2023

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Document Table of Contents

8.1.1. Device Feature Header Lo

Description: Lower 32-bit of Device Feature Header (DFH)

Byte Offset: 0x0

Addressing Mode: 32bits

Bit Type Value after Reset Description
31:16 RO 0x1000

NextDFH Byte Offset Bit [31:16]

NextDFH Address = 0x1000 (Current DFH Address)+Next DFH Byte Offset

Used to figure out Next DFH Address and as an indication for the maximum size of MMIO region occupied by this feature.

For last feature, this offset points to the beginning of the unallocated MMIO region, if any (or beyond the end of the MMIO space).

15:12 RO 0x2 Feature Revision
11:0 RO 0x15 Feature ID