External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP User Guide

ID 772538
Date 10/02/2023

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5.1. Simulation Walkthrough

Simulation is a good way to determine the latency of your system. However, the latency reflected in simulation may be different than the latency found on the board because functional simulation does not take into account board trace delays and different process, voltage, and temperature scenarios.

A given design may display different latency values on different boards, due to differences in board implementation.

The Intel Agilex® 7 M-Series EMIF IP supports functional simulation through the design example using the traffic generator IP.

To perform functional simulation for an Intel Agilex® 7 M-Series EMIF IP design example, locate the design example files in the design example directory.

You can use the IP functional simulation model with any supported VHDL or Verilog HDL simulator.

After you have generated the memory IP, you can locate multiple file sets for various supported simulations in the sim/ed_sim subdirectory. For more information about the EMIF simulation design example, refer to the External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP Design Example User Guide.