Agilex™ 5 FPGAs and SoCs Device Overview

ID 762191
Date 4/01/2024
Public
Document Table of Contents

14. Balls Anywhere Package Design of Intel Agilex® 5 FPGAs and SoCs

Most of the Intel Agilex® 5 FPGAs and SoCs packages use the "balls anywhere" package design. The E-Series FPGAs also offer 0.5 mm ball pitch package with a standard ball grid for small form-factor with more I/O counts.

Compared to the standard ball grid array (BGA) packages, the "balls anywhere" package has a mixed ball pitch and differently-sized pads. The "balls anywhere" package has a mixed ball pitch size with a minimum ball pitch of 0.65 mm.

Figure 13. Comparison Between Standard Grid and Balls Anywhere


The mixed ball pitch helps reduce the package form factor by 1 mm to 2 mm. Despite the smaller package size, the "balls anywhere" packages can provide the same I/O pin count and compatible electrical performance compared to the standard BGA packages.

As shown in the following figure, the mixed ball grid pattern has differently-sized pads. This feature eases trace routability, reducing the design complexity, number of PCB layers, and board thickness and size—ultimately, reducing board cost and development time.

Figure 14. Example of PCB Trace Routing for Balls Anywhere Package