Agilex™ 5 FPGAs and SoCs Device Overview

ID 762191
Date 4/01/2024
Document Table of Contents

8. General Purpose I/Os in Agilex™ 5 FPGAs and SoCs

The Agilex™ 5 FPGAs and SoCs are equipped with two types of general purpose I/Os—the high-speed I/Os (HSIO) and the high-voltage I/Os (HVIO). Both HSIO and HVIO enable important support for edge applications in Agilex™ 5 FPGAs and SoCs.
Table 14.  I/O Standards Support and Performance
I/O Type I/Os Per Bank I/O Standard Specification Notes
HSIO 9616 LVCMOS 1.0 V, 1.05 V, 1.1 V, and 1.2 V single-ended
  • 1.3 V
  • Up to 1.6 Gbps
Works with the LVDS SERDES Intel® FPGA IP
  • Version 2.5
  • Up to 3.5 Gbps 17 (high speed and low power mode)

Supports up to eight data lanes:

  • 1D+C
  • 2D+C
  • 4D+C
  • 8D+C
SGMII (TDS) Up to 1.25 Gbps If required, add AC coupling
  • 1.8 V single-ended
  • 0.250 Gbps (125 MHz DDR)
RGMII support at 1.8 V
  • 2.5 V/3.3 V single-ended
  • 0.200 Gbps (100 MHz DDR)
16 There are two sub-banks in each HSIO bank. Each sub-bank is powered by its own VCCIO.
17 Up to 3.5 Gbps for standard reference channel, and up to 2.5 Gbps for long reference channel.