AN 896: Multi-Rail Power Sequencer and Monitor Reference Design

ID 683778
Date 9/30/2019
Public
Document Table of Contents

1.1. Features of the Reference Design

The Multi-Rail Power Sequencer and Monitor reference design has the following features:

  • The design can control the enable sequence of up to 143 output rails.
  • The design can draw from a mix of power good input signals (POK) and monitored voltage rails.
  • You can base the power sequencing on voltages reaching a threshold or on timed events.
  • You can distribute the design across multiple Intel® MAX® 10 devices to increase the number of monitored voltage rails.

These are some of the options, among many others, that the reference design provides:

  • Parameterizable levels of glitch filtering on power good or voltage inputs
  • Customizable retry responses
  • Comprehensive PMBus* interface

To download the Multi-Rail Power Sequencer and Monitor reference design, refer to the related information.

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