AN 755: Implementing JESD204B IP Core System Reference Design with ARM HPS As Control Unit (Baremetal Flow)
ID
683776
Date
12/30/2015
Public
Visible to Intel only — GUID: bhc1447657950558
Ixiasoft
1.3. Reference Design Components
The reference design consists of the following components:
- Qsys system
- ARM HPS control unit and supporting processor peripherals
- JESD204B subsystem
- Core PLL
- Assembler and deassembler (in the transport layer)
- Test pattern generator
- Test pattern checker