AN 755: Implementing JESD204B IP Core System Reference Design with ARM HPS As Control Unit (Baremetal Flow)

ID 683776
Date 12/30/2015
Public
Document Table of Contents

1.3.1.3.3. Transceiver PHY Reset Controller

The transceiver PHY reset controller is a standard Qsys component in the IP Catalog standard library. This module takes the transceiver PHY reset output from the reset sequencer and generates the proper analog and digital reset sequencing for the transceiver PHY module.

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