AN 755: Implementing JESD204B IP Core System Reference Design with ARM HPS As Control Unit (Baremetal Flow)

ID 683776
Date 12/30/2015
Document Table of Contents

1.2.1. Hardware and Software Requirements

This reference design uses the following hardware and software tools:

  • Arria V SoC development kit
  • ADI AD9680 ADC converter card
  • ADI AD9516 clock module
  • Quartus® Prime software version 15.1
  • Altera SoC Embedded Design Suite (EDS) with ARM® DS-5 Altera Edition tool

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