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6.3.2.1.4. JTAG
FPGAs use the JTAG interface for programming, communication, and verification. Designers frequently connect several components, including FPGAs, discrete processors, and memory devices, communicating with them through a single JTAG chain. Sometimes the JTAG signal is distorted by electrical noise, causing a communication failure for the entire group of devices. To guarantee a stable connection, you must isolate the FPGA under test from the other devices in the same JTAG chain.
The figure below Part A illustrates a JTAG chain with three devices. The tdi and tdo signals include 0 ohm resistors between each device. By removing the appropriate resistors, it is possible to isolate a single device in the chain as the figure below Part B illustrates. This technique allows you to isolate one device while using a single JTAG chain.
To learn more about JTAG refer to AN39: IEEE 1149.1(JTAG) Boundary-Scan Testing in Intel FPGA Devices.