Embedded Design Handbook

ID 683689
Date 8/28/2023
Public
Document Table of Contents

5.3.9.2. Building an Appropriate Platform Designer System

Before you can successfully implement an externally controlled Nios® II boot, you must ensure your Platform Designer system contains the necessary hardware. An external processor must be able to access the appropriate system peripherals and control the reset state of the Nios® II processor. The following list describes the minimum hardware elements required to support an externally controlled Nios® II boot.

  • External Processor Bridge
  • Nios® II processor with the following features:
    • A cpu_resetrequest signal
    • A reset address that points to RAM
    • A one-bit parallel I/O (PIO) peripheral device
Figure 230. Block Diagram of Externally Controlled Nios® II Boot SystemThis block diagram is of a system that can control the boot of a Nios® II processor externally.