Embedded Design Handbook

ID 683689
Date 8/28/2023
Public
Document Table of Contents

5.3.9.3.3. External Boot Flow

The following section describes the boot flow implemented in the example C code mentioned in the previous section. These steps are written from the perspective of software running on an external processor which is responsible for controlling the Nios® II boot process.

  1. Retrieve the Nios® II boot image.

    The software can retrieve the Nios® II boot image any number of ways. Common methods include reading the boot image from non-volatile storage such as hard disk or flash memory, downloading it over an Ethernet connection, or passing in a pointer to its location in RAM. Most important is that the image be locally accessible in its entirety before you attempt to unpack it and copy it to Nios® II program memory.

  2. Hold the Nios® II processor in reset using the one-bit PIO, by performing the following actions:
    1. Write any 32-bit value to offset 0x3 of the PIO component to clear the edge-capture register. Using the edge-capture register to detect when the cpu_resettaken signal goes high requires that you clear the edge-captureregister first to ensure the register value does not represent an edge event that occurred in the past.
    2. Write the value 1 to offset 0x0 in the PIO component to assert the Nios® II cpu_resetrequest signal.
    3. Continuously poll offset 0x3 of the PIO component until it holds the value 1. Thisvalue indicates that the Nios® II cpu_resettaken signal transitioned high, which ensures the Nios® II processor is now in a reset state and you can safely begin copying application code to its program memory.
  3. Copy the application to its destination address in memory space.
  4. Parse the boot record to copy each section of the application code to its appropriate location in Nios® II program memory.

    The final individual record in the boot record is a jump record. Be sure to save the jump value, which contains the entry point of the application code. In the next step, you must direct the Nios® II processor to the application entry point.

  5. Construct a branch instruction to place at the Nios® II reset address.

    Constructing a Nios® II branch (br) instruction allows Nios® II to branch from its reset address to the entry point of the application code. Because the Nios® II branch instruction is relative, meaning it branches relative to the current instruction, you need to know both the Nios® II reset address, and the application entry point address.

    In the example code, the Nios® II reset address is simply defined at the top of the file. If your Nios® II reset address changes, you must also change the relevant #define in the example code.

  6. Subtract the reset address from the entry point address (saved in the previous step) to obtain the offset.

    For Nios® II pipelining, the branch instruction actually requires the offset to be relative to the next instruction, so subtract 4 from the offset to obtain the actual offset needed for the instruction.

    Note: Because all Nios® II instructions are 32 bits, every address and offset must be a multiple of 4.
    Note: The offset used in the branch instruction is 16 bits, so your reset address must be less than 64Kbytes away from the application entry point in memory space.
    Using the branch instruction encoding shown in the following table, construct a branch instruction from the offset. The following C statements create a properly encoded instruction from the reset address and entry point:
    int offset = entry_point – reset_address; unsigned int inst = ((offset - 4) << 6) | 0x6;
    Table 46.   Nios® II Branch Instruction Encoding
    31-27 26-22 21-6 5-0
    0 0 16-bit offset - 4 0x06
  7. Write the branch instruction to the Nios® II reset address.
  8. Release the Nios® II processor from reset.

    Write a zero to offset 0x0 of the PIO peripheral to deassert the Nios® II cpu_resetrequest signal. The Nios® II processor should come out of reset, execute the branch instruction, branch to the entry point of the application, and begin to execute it.

    Booting is now complete. The Nios® II processor is off and running, so the external processor can go about its other system tasks.