Embedded Design Handbook

ID 683689
Date 8/28/2023
Public
Document Table of Contents

5.2.5.1. Nios® II Processor Application Executes in-place from OCRAM

The on-chip memory is initialized during FPGA configuration with data from a Nios® II application image. This data is built into the FPGA configuration bitstream. This process eliminates the need for a boot copier, as the Nios® II application is already in place at system reset.

Figure 164. Nios II Application XIP from OCRAM in Intel® MAX® 10 Device
Figure 165.  Nios® II Application XIP from OCRAM in FPGA Device Configured from Flash Memory
Table 43.  RAM and ROM Size Requirement
RAM Size Requirement ROM Size Requirement
Equivalent to the executable code and dynamic memory size required by user program. Not applicable for this boot option.
Figure 166. Configuration and Booting Flow