R-tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683501
Date 6/20/2022
Public

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5.2.3.12. Access Control Service (ACS)

Note: This feature is available if the IP is in Root Port mode, or if the IP is in Endpoint mode and the Enable multiple physical functions in the PCIeN Device tab is set to True.
Table 97.  ACS Capabilities for Physical Functions
Parameter Value Default Value Description
Enable Access Control Service (ACS) True/False False ACS defines a set of control points within a PCI Express topology to determine whether a TLP is to be routed normally, blocked, or redirected.
Enable ACS P2P Traffic Support True/False False Indicates if the component supports Peer to Peer Traffic.
Enable ACS P2P Egress Control True/False False

Indicates if the component implements ACS P2P Egress Control.

This parameter is visible only if Enable ACS P2P Traffic Support is set to True.

Enable ACS P2P Egress Control Vector Size 0 - 255 0

Indicates the number of bits in the ACS P2P Egress Control Vector.

This parameter is visible only if Enable ACS P2P Egress Control is set to True.

Table 98.  ACS Capabilities for Virtual Functions
Parameter Value Default Value Description
Enable Access Control Service (ACS) True/False False ACS defines a set of control points within a PCI Express topology to determine whether a TLP is to be routed normally, blocked, or redirected.

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