|Intel® Quartus® Prime Design Suite 19.3|
A design block is the logic comprising a hierarchical design instance. Block-based design flows enable preservation of blocks within a project via Incremental Block-Based Compilation, as well as reuse of design blocks in other projects via Design Block Reuse. To preserve or reuse a design block, you must designate the block as a design partition.
Verifying a block-based design requires planning to ensure visibility of logic inside partitions and communication with the Signal Tap logic analyzer. The preparation steps depend on whether you are reusing a core partition or a root partition.
For basic information about designing with reusable blocks, refer to the Intel® Quartus® Prime Pro Edition User Guide: Block-Based Design . For step-by-step instructions on reusing design blocks, refer to AN 839: Design Block Reuse Tutorial for Intel® Arria® 10 FPGA Development Board .
This tutorial uses a provided design example to walk through the steps required to perform Signal Tap debugging in reused design blocks.
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