Serial Lite III Streaming Intel® Stratix® 10 FPGA IP Design Example User Guide

ID 683341
Date 11/01/2021
Document Table of Contents

3.4. Simulation

The simulation test cases demonstrate continuous streaming of 2000 sample data from the traffic generator to the Serial Lite III Streaming source core and externally loopback to the sink core in advanced clocking mode.

The simulation test case performs the following steps:
  1. Initialize and configures Serial Lite III Streaming IP core, traffic generator and traffic checker.
  2. Traffic generator generates data and starts data transmission.
  3. Logs and display link up status and burst information.
  4. Traffic checker verifies received data and stop transmission.
  5. Testbench logs and displays test result and test information.
Figure 27. Sample of Successful Simulation