100G Interlaken Intel® FPGA IP User Guide

ID 683338
Date 9/20/2022
Public

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Document Table of Contents

9.1. Out-of-Band Flow Control Block Clocks

Table 29.   100G Interlaken IP core Out-of-Band Flow Control Block Clocks
Clock Name Interface Direction Recommended Frequency (MHz) Description
RX fc_clk RX Out-of-band Input 100 Clocks the incoming out‑of‑band flow control interface signals described in the Interlaken specification. This clock is received from an upstream TX out‑of‑band flow control block associated with the Interlaken link partner. The recommended frequency for the RX fc_clk clock is 100 MHz, which is the maximum frequency allowed by the Interlaken specification.
TX fc_clk TX Out-of-band Output 100 Clocks the outgoing out‑of‑band flow control interface signals described in the Interlaken specification. This clock is generated by the out‑of‑band flow control block and sent to a downstream RX out‑of‑band flow control block associated with the Interlaken link partner. The frequency of this clock must be half the frequency of the double_fc_clk clock. The recommended frequency for the TX fc_clk clock is 100 MHz, which is the maximum frequency allowed by the Interlaken specification.
sys_clk RX Application Input 200 Clocks the outgoing calendar and status information on the application side of the block. The frequency of this clock must be at least double the frequency of the RX input clock fc_clk. Therefore, the recommended frequency for the sys_clk clock is 200 MHz.
double_fc_clk TX Application Input 200 Clocks the incoming calendar and status information on the application side of the block. The frequency of this clock must be double the frequency of the TX output clock fc_clk. Therefore, the recommended frequency for the double_fc_clk clock is 200 MHz.