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4.5. Dual Segment Mode
In dual segment mode, the 100G Interlaken IP core can minimize wasted bandwidth on the user data transfer interface by starting a packet transfer at Byte 31 (Word 3) of the data bus (irx_dout_words[511:0]), if the previous packet ended with four or fewer 64-bit words transferred in the current rx_usr_clk cycle.
In dual segment mode, the IP core is capable of accepting dual segment input on the TX user data transfer interface (itx_din_words[511:0]). However, the application can control IP core input signals to specify that the current incoming data transfer does not use dual segment mode. In addition, if you tie the relevant input signals (itx_sob, itx_sop, and itx_num_valid[3:0]) permanently low in your design, the Quartus Prime Fitter compiles away the IP core logic that generates dual segment output from the IP core.
You must enforce the following additional constraints in sending dual segment traffic to the TX user data transfer interface:
- The application can start a packet or burst transfer in a single cycle on only one of the most significant byte (Byte 63) or the middle position (Byte 31) in the 512-bit data symbol. Therefore, the application can assert only one of itx_sop and itx_sop, and only one of itx_sob and itx_sob, in a given cycle. This constraint ensures that the minimum number of idle and data bytes between consecutive starts of packet or burst is at least 64.
- The application can end a packet or burst transfer only once in a single cycle. Therefore, the minimum number of idle and data bytes between consecutive ends of packet or burst must be at least 64.
The same constraints apply to dual segment traffic on the RX user data transfer interface: the minimum number of idle and data bytes between consecutive starts of packet or burst must be at least 64, and the minimum number of idle and data bytes between consecutive ends of packet or burst must be at least 64. The 100G Interlaken IP core enforces these constraints on the RX user data transfer interface.
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