14.1.2. Bus Stimulus (BusStimulus)
The BusStimulus block performs hidden accesses to the registers and SharedMem blocks in the memory hierarchy of your model. It is an interface that allows another block to read and write to any address. The address and data ports act as though an external processor reads and writes to your system.
The BusStimulus block transmits data from its input ports (address, writedata and write) over the processor interface, and thus modifies the internal state of the memory-mapped registers and memories as appropriate. Any response from the simulated processor interface is output on the readdata and readvalid output ports.
For example, to use the BusStimulus block connect constants to the address and data inputs. A pulse on the write port then writes the data to any register mapped to the specified address. Put a counter on the address input to provide all the data in every memory location on the readdata port. DSP Builder asserts the readdatavalid output when a valid read data is on the readdata port.
|Sample Time||Specifies the Simulink sample time.|
|Show read enable||Turn on to show read enable port. If you use the BusStimulus with the BusStimulusFileReader blocks in a design, ensure this parameter is turned on or turned off in both blocks.|
|address||Input||Unsigned integer||Address to access.|
|writedata||Input||16-, 32-, or 64-bit unsigned integer||Write data.|
|readdata||Output||16-, 32-, or 64-bit unsigned integer||Read data.|
|readdatavalid||Output||Boolean||Read data valid.|