DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 4/29/2022

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Document Table of Contents
Give Feedback VIDEO_MODE_F1_LINE_COUNT (0x57)

Table 140.  VIDEO_MODE_F1_LINE_COUNT (0x57)
Name Bit(s) Access Description Reset
Reserved 31:16 - - -
F1 line count 15:0 RW Specifies the active picture height of interlaced video field 1. 0x0