DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 4/29/2022
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11.7.2. DPRX0_AUD_NAUD

Received audio Naud register, DPRX0_AUD_NAUD.

Address: 0×0031

Direction: RO

Reset: 0×00000000

Table 184.  DPRX0_AUD_NAUD Bits

Bit

Bit Name

Function

31:24

Unused

23:0

NAUD/AFREQ[47:24]

8B/10B Channel Coding:

Received audio Naud

128B/132B Channel Coding:

Received audio AFREQ{47:24}