DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 4/29/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

11.6.6. DPRX0_MSA_HSW

MSA horizontal synchronization width register, DPRX0_MSA_HSW.

Address: 0x0025

Direction: RO

Reset: 0x00000000

Table 172.  DPRX0_MSA_HSW Bits

Bit

Bit Name

Function

31:15

Unused

14:0

HSW

Main stream attribute horizontal synchronization width