DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 11/12/2021
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11.4.10. DPRX0_MSA_VSW

MSA vertical synchronization width register, DPRX0_MSA_VSW.

Address: 0x0029

Direction: RO

Reset: 0x00000000

Table 141.  DPRX0_MSA_VSW Bits

Bit

Bit Name

Function

31:15

Unused

14:0

VSW

Main stream attribute vertical synchronization width