DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 11/12/2021
Public

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Document Table of Contents

11.4.14. DPRX0_MSA_MISC1

Address: 0x002d

Direction: RO

Reset: 0x00000000

Table 145.  DPRX0_MSA_MISC1 Bits

Bit

Bit Name

Function

31:8

Unused

7:0

MISC1

Main stream attribute MISC1 (refer to the VESA DisplayPort Standard)