Intel® Agilex™ Device Family Pin Connection Guidelines

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ID 683112
Date 9/22/2022
Public
Document Table of Contents
Document Table of Contents
1. Intel® Agilex™ Device Family Pin Connection Guidelines
1. Intel® Agilex™ Device Family Pin Connection Guidelines
1.1. Pins Status for Intel® Agilex™ Devices 1.2. Intel® Agilex™ FPGA Core Pins 1.3. Intel® Agilex™ E-Tile Pins 1.4. Intel® Agilex™ P-Tile Pins 1.5. Intel® Agilex™ F-Tile Pins 1.6. Intel® Agilex™ R-Tile Pins 1.7. Intel® Agilex™ Hard Processor System (HPS) Pins 1.8. Intel® Agilex™ Power Supply Sharing Guidelines 1.9. Notes to Intel® Agilex™ Device Family Pin Connection Guidelines 1.10. Document Revision History for the Intel® Agilex™ Device Family Pin Connection Guidelines
1.2. Intel® Agilex™ FPGA Core Pins
1.2.1. Clock and PLL Pins 1.2.2. Dedicated Configuration/JTAG Pins 1.2.3. Optional/Dual-Purpose Configuration Pins 1.2.4. Differential I/O Pins 1.2.5. External Memory Interface Pins 1.2.6. Voltage Sensor and Voltage Reference Pins 1.2.7. Remote Temperature Sensing Diode Pins 1.2.8. Reference Pins 1.2.9. No Connect and DNU Pins 1.2.10. Power Supply Pins 1.2.11. Secure Device Manager (SDM) Pins 1.2.12. Secure Device Manager (SDM) Optional Signal Pins
1.3. Intel® Agilex™ E-Tile Pins
1.3.1. E-Tile Power Supply Pins 1.3.2. E-Tile Transceiver Pins
1.4. Intel® Agilex™ P-Tile Pins
1.4.1. P-Tile Power Supply Pins 1.4.2. P-Tile Transceiver Pins
1.5. Intel® Agilex™ F-Tile Pins
1.5.1. F-Tile Power Supply Pins 1.5.2. F-Tile Transceiver Pins
1.6. Intel® Agilex™ R-Tile Pins
1.6.1. R-Tile Power Supply Pins 1.6.2. R-Tile Transceiver Pins
1.7. Intel® Agilex™ Hard Processor System (HPS) Pins
1.7.1. HPS Supply Pins 1.7.2. HPS Oscillator Clock Input Pin 1.7.3. HPS JTAG Pins 1.7.4. HPS GPIO Pins 1.7.5. HPS SDMMC Pins 1.7.6. HPS NAND Pins 1.7.7. HPS USB Pins 1.7.8. HPS EMAC Pins 1.7.9. HPS I2C_EMAC and MDIO Pins 1.7.10. HPS I2C Pins 1.7.11. HPS SPI Pins 1.7.12. HPS UART Pins 1.7.13. HPS Trace Pins
1.8. Intel® Agilex™ Power Supply Sharing Guidelines
1.8.1. Example 1— Intel® Agilex™ Devices (P-Tile and E-Tile) 1.8.2. Example 2— Intel® Agilex™ Devices (F-Tile and R-Tile)
1. Intel® Agilex™ Device Family Pin Connection Guidelines

1.8. Intel® Agilex™ Power Supply Sharing Guidelines

Intel® Agilex™ devices have specific power-up and power-down sequence requirements. For more information, refer to the Intel® Agilex™ Power Management User Guide.

Note: Intel® recommends you to generate a .pin file from the Intel® Quartus® Prime Fitter to verify power pin assignment. Intel® also recommends using this .pin file to determine if it is safe to power down or ground certain power supplies for your specific design. This step will inform you to make the appropriate design choices for unused power supplies for your design.

Section Content
Example 1— Intel Agilex Devices (P-Tile and E-Tile)
Example 2— Intel Agilex Devices (F-Tile and R-Tile)

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