Intel® Agilex™ Device Family Pin Connection Guidelines

ID 683112
Date 9/22/2022
Public
Document Table of Contents

1.2.4. Differential I/O Pins

Note: Intel® recommends that you create an Intel® Quartus® Prime design, enter your device I/O assignments, and compile the design. The Intel® Quartus® Prime software will check your pin connections according to I/O assignment and placement rules. The rules differ from one device to another based on device density, package, I/O assignments, voltage assignments, and other factors that are not fully described in this document or the device handbook.
Table 5.  Differential I/O Pins
Pin Name Pin Functions Pin Description Connection Guidelines

DIFF_RX[2][A,B,C,D,E,F][1:24][p,n]

DIFF_RX[3][A,B,C,D,E,F][1:24][p,n]

I/O, RX channel

These are SERDES receiver channels on GPIO banks. If these pins are not used in SERDES implementation, these pins are available as user I/O pins.

Supported I/O standards:

  • 1.5-V I/O standard for true differential I/O
  • 1.2-V I/O standard for single-ended voltage referenced and non-voltage referenced I/O
  • 1.2-V I/O standard for differential voltage referenced I/O

These pins support the programmable pull-up resistor. For more information, refer to the Intel® Agilex™ Device Data Sheet.

For more information about the supported pins, refer to the device pin-out file.

Connect unused pins as defined in the Intel® Quartus® Prime software.

DIFF_TX[2][A,B,C,D,E,F][1:24][p,n]

DIFF_TX[3][A,B,C,D,E,F][1:24][p,n]

I/O, TX channel

These are SERDES transmitter channels on GPIO banks. If these pins are not used in SERDES implementation, these pins are available as user I/O pins.

Supported I/O standards:

  • 1.5-V I/O standard for true differential I/O
  • 1.2-V I/O standard for single-ended voltage referenced and non-voltage referenced I/O
  • 1.2-V I/O standard for differential voltage referenced I/O

These pins support the programmable pull-up resistor. For more information, refer to the Intel® Agilex™ Device Data Sheet.

For more information about the supported pins, refer to the device pin-out file.

Connect unused pins as defined in the Intel® Quartus® Prime software.

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