Intel® MAX® 10 External Memory Interface User Guide

ID 683087
Date 10/31/2022
Public

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3.2.2. LPPDDR2 Power Supply Variation Constraint

For an LPDDR2 interface that targets 200 MHz, constrain the memory device I/O and core power supply variation to within ±3%.
  • Memory I/O power supply pin is VDDQ
  • Memory core power supply pin is VDD