Intel® MAX® 10 External Memory Interface User Guide

ID 683087
Date 10/31/2022
Public
Document Table of Contents

3.1.1.3. DDR2/DDR3 Error Correction Coding Pins

Some DDR2 and DDR3 SDRAM devices support error correction coding (ECC). ECC is a method of detecting and automatically correcting errors in data transmission.
  • In 24-bit DDR2 or DDR3 SDRAM, there are eight ECC data pins and 16 data pins.
  • Connect the DDR2 and DDR3 SDRAM ECC pins to a separate DQS or DQ group in the Intel® MAX® 10 device.
  • The memory controller needs additional logic to encode and decode the ECC data.

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