Intel® MAX® 10 External Memory Interface User Guide

ID 683087
Date 10/31/2022
Public
Document Table of Contents

2.5. Intel® MAX® 10 External Memory Read Datapath

In Intel® MAX® 10 devices, instead of using DQS strobes, the memory interface solution uses internal read capture clock to capture data directly in the double data rate I/O (DDIO) registers in the I/O elements.
  • The PLL supplies memory clock to the DRAM device and generates read capture clock that is frequency-locked to the incoming data stream. The read capture clock and the incoming read data stream have an arbitrary phase relationship.
  • For maximum timing margin, calibration sequence is used to position the read capture clock within the optimum sampling position in the read data eye.
  • Data is captured directly in the DDIO registers implemented in the I/O periphery.

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