AN 958: Board Design Guidelines

ID 683073
Date 1/28/2022
Public
Document Table of Contents

1.5.6. Conclusion

To successfully design an effective PDS requires an understanding of the various parasitic inductances that can limit the performance of the PDS. This document explains three parasitic inductances that you must be concerned with in designing the PDS. VRM parasitic inductance, decoupling capacitor mounting inductance, and power plane spreading inductance are examined and techniques to minimize them are presented. For additional information and tools, download the PDN Decoupling Calculator tool and user guide

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