AN 958: Board Design Guidelines

ID 683073
Date 1/28/2022
Document Table of Contents Analyzing Ground Bounce

Figure 69 shows a simple model for analyzing ground bounce. The external components driven by the device appear as capacitance loads to that device (C1 to Cn). These capacitive loads store a charge determined by the following equation:

Thus, the charge increases as the voltage and/or load capacitance increases.

Figure 69. Ground Bounce Model

A device's environment and ground path have intrinsic inductances (shown in Figure 69 as L1, L2, and L3). L1 is the inductance of the bond wire from the device's die to its package pin, and of the pin itself. L2 is the inductance of the connection mechanism between the device's ground pin and the PCB. This inductance is greatest when the device is connected to the PCB through a socket. L3 is the inductance of the PCB trace between the device and the PCB location where the power supply's reference ground is connected.

Ground bounce occurs when multiple outputs switch from high to low. The transition causes the charge stored in the load capacitance to flow into the device. The sudden rush of current (di/dt) exits the device through the inductances (L) to board ground, generating a voltage (V) determined by the equation V = L × (di/dt). This voltage difference between board ground and device ground causes the relative ground level for low or quiet outputs to temporarily rise or bounce. Although the rush of current is brief, the magnitude of the bounce can be large enough to trigger other devices on the PCB.

In synchronous designs, ground bounce is less often a problem because synchronous outputs have enough time to settle before the next clock edge. Also, synchronous circuits are not as likely to be falsely triggered by a voltage spike on a quiet output.

Capacitive loading on the switching outputs and quiet outputs affect ground bounce differently.
  • Charge (Q) = [voltage (V) × capacitance (C)]

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