1. Power Distribution Network 2. Gigahertz Channel Design Considerations 3. PCB and Stack-Up Design Considerations 4. Device Pin-Map, Checklists, and Connection Guidelines 5. General Board Design Considerations/Guidelines 6. Memory Interfacing Guidelines 7. Power Dissipation and Thermal Management 8. Tools, Models, and Libraries 9. Reference Designs and Development Kits 10. Document Revision History for AN 958: Board Design Guidelines
4.1. High Speed Board Design Advisor 4.2. Complete Pin Connection Table by Device 4.3. Pin Connection Guidelines By Device 4.4. Design for Debug with JTAG Pins 4.5. Hot Socketing, POR and Power Sequencing Support 4.6. Implementing OCT 4.7. Unused I/O Pins Guidelines 4.8. Device Breakout Guidelines 4.9. Additional Resources
5.1.1. Material Selection and Loss 5.1.2. Cross Talk Minimization 5.1.3. Power Filtering/Distribution 5.1.4. Unused I/O Pins 5.1.5. Signal Trace Routing 5.1.6. Ground Bounce 5.1.7. Understanding Transmission Lines 5.1.8. Impedance Calculation 5.1.9. Coplanar Wave Guides 5.1.10. Simultaneous Switching Noise Guidelines
126.96.36.199. Differential Trace Routing
To maximize signal integrity, proper routing techniques for differential signals are important for high-speed designs. Figure 25 shows a differential pair using the microstrip layout.
Figure 25. Differential Trace Routing
Note: Use the following guidelines when using two differential pairs:
- D = Distance between two differential pair signals; W = Width of a trace in a differential pair; S = Distance between the trace in a differential pair; and H = Dielectric height above the group plane.
- Make sure D > 2S to minimize the crosstalk between the two differential pairs.
- To minimize reflection noise, place the differential traces S = 3H as they leave the device.
- Keep the distance between the differential traces (S) constant over the entire trace length.
- Keep the length of the two differential traces the same to minimize the skew and phase difference.
- Avoid using multiple vias, because they can cause impedance mismatch and inductance.