1. Overview
2. BGA Footprint and Land Pattern
3. General PCB Design Considerations
4. VPBGA PCB Routing Guidelines
5. MBGA PCB Routing Guidelines
6. EMIF PCB Routing Guidelines (VPBGA and MBGA)
7. MIPI Interface Layout Design Guidelines (VPBGA and MBGA)
8. True Differential I/O Interface PCB Routing Guidelines
9. Power Distribution Network Design Guidelines
10. Document Revision History for the PCB Design Guidelines: Agilex™ 3 FPGAs and SoCs
9.1. Agilex™ 3 Power Distribution Network Design Guidelines Overview
9.2. Power Delivery Overview
9.3. Board Power Delivery Network Recommendations
9.4. Board LC Recommended Filters for Noise Reduction in Combined Power Delivery Rails
9.5. PCB PDN Design Guideline for Unused GTS Transceiver
9.6. PCB Voltage Regulator Recommendation for PCB Power Rails
9.7. Board PDN Simulations
9.8. Agilex™ 3 Device Family PDN Design Summary
9.3.3. Remote Sense Connections
Die sense pins are provided for the core fabric voltage regulator. You must connect the voltage regulator sense line for VCC core to the differential pair sense lines or pins provided on the package. Ensure that the voltage regulator feedback inputs are connected to this FPGA die remote sense lines.
You must use sense lines for Agilex™ 3 core, including the VID and multi-voltage designs.
Note: For power rails that do not have dedicated sense pins at package level, compensate the IR drop by using a voltage regulator with the sense feedback pin. To identify the sense pins, analyze the IR drop by plotting the power or current distribution of the specific power rail at the package level. This helps to locate the pins that are the most suitable for the voltage regulator compensation.
Note: Any sense line used on the board for that specific power rail must be placed before LC filter. If a sense line is placed after the LC filter, it can result in oscillation to the rails and an unstable voltage that is an input to the voltage regulator feedback pin function. If the power rail is using LDO, LC filter is not required.