PCB Design Guidelines: Agilex™ 3 FPGAs and SoCs

ID 853726
Date 8/20/2025
Public
Document Table of Contents

9.5. PCB PDN Design Guideline for Unused GTS Transceiver

This section describes the PDN design guidelines for unused GTS transceiver on PCB design. Refer to the Pin Connection Guidelines: Agilex™ 3 FPGAs and SoCs for more information.