1. Overview
2. BGA Footprint and Land Pattern
3. General PCB Design Considerations
4. VPBGA PCB Routing Guidelines
5. MBGA PCB Routing Guidelines
6. EMIF PCB Routing Guidelines (VPBGA and MBGA)
7. MIPI Interface Layout Design Guidelines (VPBGA and MBGA)
8. True Differential I/O Interface PCB Routing Guidelines
9. Power Distribution Network Design Guidelines
10. Document Revision History for the PCB Design Guidelines: Agilex™ 3 FPGAs and SoCs
9.1. Agilex™ 3 Power Distribution Network Design Guidelines Overview
9.2. Power Delivery Overview
9.3. Board Power Delivery Network Recommendations
9.4. Board LC Recommended Filters for Noise Reduction in Combined Power Delivery Rails
9.5. PCB PDN Design Guideline for Unused GTS Transceiver
9.6. PCB Voltage Regulator Recommendation for PCB Power Rails
9.7. Board PDN Simulations
9.8. Agilex™ 3 Device Family PDN Design Summary
1. Overview
This document provides guidelines for creating superior PCB designs for Agilex™ 3 FPGAs and SoCs. The document covers printed circuit board (PCB) layouts, High Speed Serial Interface (HSSI), External Memory Interface (EMIF), Mobile Industry Processor Interface (MIPI), True Differential I/O Interfaces, and Power Distribution Network (PDN).
The guidelines include recommended footprint and land patterns, and HSSI, EMIF, MIPI, and True Differential I/O routing guidelines for the following Agilex™ 3 FPGAs and SoCs packages:
- B18A—474-pins VPBGA package
- M16A—896-pins MBGA package
Note: Information for the following packages are under development and not yet available: B18B, B23C, and M12A.
Note: References to Agilex™ 5 PCB boards in this document are intentional. You can use the Agilex™ 5 PCB guidelines as a reference when designing PCBs for Agilex™ 3 devices unless otherwise stated.