F-Tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 1/24/2024
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2.3.2.1.4. FGT Data Pattern Generator and Verifier

The PMA supports a built-in transmitter data pattern generator for transmit characterization. The pattern and size are programmable.

Table 19.  Supported Programmable PRBS Patterns by Mode
NRZ PAM4

PRBS7

PRBS9

PRBS10

PRBS13

PRBS15

PRBS23

PRBS28

PRBS3113

QPRBS13

QPRBS31

PRBS13Q

PRBS31Q

SSPR

SSPR1

SSPRQ

User-defined pattern (up to 320 bits)
The data pattern verifier contains a receiver built-in self test (BIST) bit error checker. The receiver can check standard data patterns for link verification applications by enabling the PRBS mode in both the receiver link and a compatible transmitter link connected by a common transmission path or loopback.
Note:
  • PRBS13Q, PRBS31Q are defined in IEEE Std 802.3bs-2017.
  • QPRBS13 is defined in IEEE Std 802.3 94.2.9.3.
  • SSPR is Short Stress Pattern Random test pattern. It is defined in OIF CEI 3.1 2.D.2
  • SSPR1 is defined in OIF CEI 3.1 2.D.2.
  • SSPRQ is defined in IEEE 802.3 120.5.11.2.3.
13

The PRBS31, QPRBS13, PRBS13Q, PRBS31Q, SSPR, SSPR1, and SSPRQ PRBS generator mode settings are not currently supported through the IP GUI, although present in the parameter editor. Do not select any of the unsupported PRBS generator mode settings. Specify these settings using registers.