F-tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 1/25/2023

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3.4.6. TX PMA Control Signals

Table 43.  TX PMA Control SignalsRefer to Variables Defining Bits for the Interfacing Ports in Port and Signal Reference for variable definitions.
Signal Name Clock Domain/Resets Direction Description
fgt_tx_beacon[N-1:0] asynchronous input

1'b1: enable SATA beacon signal.

1'b0: disable SATA beacon signal.

fgt_tx_pma_elecidle[(3*x-1:0)] tx_coreclkin tx_reset input When the FGT PMA configuration rules parameter is set to SATA or USB and Enable simplified TX data interface parameter is enabled, this port is available as a separate 4-bit bus. When asserted, the FGT PMA transmitter is forced into an electrical idle condition.
  • 4'b0000: FGT TX is not in electrical idle mode.
  • 4'b1111: FGT TX enters electrical idle mode.