Visible to Intel only — GUID: evl1628870638944
Ixiasoft
Visible to Intel only — GUID: evl1628870638944
Ixiasoft
2.2.9. Preserving Unused PMA Lanes
To preserve the performance of unused PMA lanes, the Intel® Quartus® Prime software can program the unused PMA lanes, such that the analog circuitry in their transmit and receive stages toggles at a low data rate.
- Unused PMA lanes in a completely unused F-tile.
- Unused PMA lanes in a partially used F-tile.
Unused PMA Lanes in a Completely Unused F-tile
- You must tie the various F-tile power rails to ground to save power.
- You must not use .qsf assignments shown below in your project, to preserve the F-tile.
- You must configure and power the F-tile and connect all power rails to the appropriate power supplies.
- You must use .qsf assignments in your project to preserve the unused F-tile.
You must use one of the .qsf assignments shown below to preserve unused lanes in the F-tile.
set_instance_assignment -name PRESERVE_UNUSED_XCVR_CHANNEL ON -to <pinname>
set_instance_assignment -name PRESERVE_UNUSED_XCVR_CHANNEL ON -to JW83
- <pinname> identifies the corresponding unused F-tile for preservation.
- Preserves the entire F-tile with a single pin. Pin can be specified on any lane, even if you do not connect the pin on the board.
- You can also use this .qsf assignment multiple times with corresponding pins from each F-tile to preserve multiple unused F-tiles.
set_global_assignment -name PRESERVE_UNUSED_XCVR_CHANNEL ON
- You have 4 tiles in a package – one partially used tile and three others you want to preserve. You can use the global .qsf assignment to preserve the three tiles.
- You have 4 tiles in a package – one partially used tile, one tile with the power rails tied to ground to save power and two other tiles that you want preserve. Do not use the global .qsf assignment, but instead you must use the single pin F-tile .qsf assignment to preserve those two tiles.
Unused PMA lanes in a Partially Used F-tile
If your design does not instantiate (does not use) a PMA lane, preservation of the unused PMA lane in the partially used F-tile takes place by default.
- If the PMA reference clock is not available, then the PMA must be held in reset. For example, when you are using the HDMI IP.
- You must not send long periods of all zeros or all ones on the TX PMA lane. If the PMA is held in reset, you do not need to follow this rule.
- For the FHT PMA lanes, you must set cfg_preserve_enable (0xF0030[3:0]) to 4’b1111 to preserve the lanes. LSB is for lane 0 and MSB is for lane 3.
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