F-tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 1/25/2023

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Document Table of Contents RTL Connection Example for JTAG to Avalon® Master Bridge Intel IP

The following examples show the RTL connections for a two lane FGT PMA channel implementation.
The reconfig_pdb_address and reconfig_xcvr_address address bus width is:
[14:0] reconfig_pdp_address,
[18:0] reconfig_xcvr_address,
You set the address parameters for the datapath and PMA interface in your design file as follows:
parameter  pdp_addr_width = 15,
parameter  xcvr_addr_width = 19,
Note: The F-Tile PMA/FEC Direct PHY Intel® FPGA IP uses word addressing format for both the datapath and PMA reconfiguration address bus interface. The JTAG to Avalon® Master Bridge Intel FPGA IP uses byte addressing format. Therefore, you must handle the conversion of word addressing format to byte addressing format by shifting the reconfiguration address bus by two bits, as shown in the following examples.

Example datapath reconfiguration interface connections:

.reconfig_pdp_clk           ( 100MHz                   ),
.reconfig_pdp_reset         ( reconfig_reset           ),
.reconfig_pdp_write         ( pdb_write_bridge         ),
.reconfig_pdp_read          ( pdb_read_bridge          ),
.reconfig_pdp_address       ( pdb_address_bridge [pdp_addr_width + 1: 2]),
.reconfig_pdp_byteenable    ( pdb_byteenable_bridge    ),
.reconfig_pdp_writedata     ( pdb_writedata_bridge     ),
.reconfig_pdp_readdata      ( pdb_readdata_bridge      ),
.reconfig_pdp_readdatavalid ( pdb_readdatavalid_bridge ),
.reconfig_pdp_waitrequest   ( pdb_waitrequest_bridge   )

Example PMA reconfiguration interface connections:

.reconfig_xcvr_clk           ( 100MHz                    ),
.reconfig_xcvr_reset         ( reconfig_reset            ),
.reconfig_xcvr_write         ( xcvr_write_bridge         ),
.reconfig_xcvr_read          ( xcvr_write_bridge         ),
.reconfig_xcvr_address       ( xcvr_address_bridge [xcvr_addr_width + 1: 2]),
.reconfig_xcvr_byteenable    ( xcvr_byteenable_bridge    ),
.reconfig_xcvr_writedata     ( xcvr_writedata_bridge     ),
.reconfig_xcvr_readdata      ( xcvr_readdata_bridge      ),
.reconfig_xcvr_readdatavalid ( xcvr_readdatavalid_bridge ),
.reconfig_xcvr_waitrequest   ( xcvr_waitrequest_bridge   )