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1. CvP Initialization in Intel® Arria® 10
2. Design Considerations for CvP Initialization in Intel® Arria® 10
3. Understanding the Design Steps for CvP Initialization in Intel® Arria® 10
4. CvP Driver and Registers
5. Partial Reconfiguration over PCI Express in Intel® Arria® 10
6. Understanding Design Steps for PR over PCI Express in Intel® Arria® 10
7. Document Revision History for the Intel® Arria® 10 CvP Initialization and Partial Reconfiguration over PCI Express* User Guide
4.3.1. Altera-defined Vendor Specific Capability Header Register
4.3.2. Altera-defined Vendor Specific Header Register
4.3.3. Altera Marker Register
4.3.4. CvP Status Register
4.3.5. CvP Mode Control Register
4.3.6. CvP Data Registers
4.3.7. CvP Programming Control Register
4.3.8. Uncorrectable Internal Error Status Register
4.3.9. Uncorrectable Internal Error Mask Register
4.3.10. Correctable Internal Error Status Register
4.3.11. Correctable Internal Error Mask Register
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4.3.8. Uncorrectable Internal Error Status Register
This register reports the status of the internally checked errors that are uncorrectable. When specific errors are enabled by the Uncorrectable Internal Error Mask register, they are handled as Uncorrectable Internal Errors as defined in the PCI Express Base Specification 3.0. This register is for debug only. Use this register to observe behavior, not to drive custom logic.
Bits | Reset Value | Access | Description |
---|---|---|---|
[31:12] | 0x00 | RO | Reserved. |
[11] | 1'b0 | RW1CS | A value of 1 indicates an RX buffer overflow condition in a posted request or Completion segment. |
[10] | 1'b0 | RW1CS | A value of 1 indicates a parity error was detected on the R2CSEB interface. |
[9] | 1'b0 | RW1CS | A value of 1 indicates a parity error was detected on the Configuration Space to TX bus interface. |
[8] | 1'b0 | RW1CS | A value of 1 indicates a parity error was detected on the TX to Configuration Space bus interface. |
[7] | 1'b0 | RW1CS | A value of 1 indicates a parity error was detected in a TX TLP and the TLP is not sent. |
[6] | 1'b0 | RW1CS | A value of 1 indicates that the Application Layer has detected an uncorrectable internal error. |
[5] | 1'b0 | RW1CS | A value of 1 indicates a configuration error has been detected in CvP mode which is reported as uncorrectable. This CVP_CONFIG_ERROR_LATCHED bit is set whenever a CVP_CONFIG_ERROR is asserted while in CVP_MODE. |
[4] | 1'b0 | RW1CS | A value of 1 indicates a parity error was detected by the TX Data Link Layer. |
[3] | 1'b0 | RW1CS | A value of 1 indicates a parity error has been detected on the RX to Configuration Space bus interface. |
[2] | 1'b0 | RW1CS | A value of 1 indicates a parity error was detected at input to the RX Buffer. |
[1] | 1'b0 | RW1CS | A value of 1 indicates a retry buffer uncorrectable ECC error. |
[0] | 1'b0 | RW1CS | A value of 1 indicates a RX buffer uncorrectable ECC error. |