Visible to Intel only — GUID: nik1412546939101
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1. CvP Initialization in Intel® Arria® 10
2. Design Considerations for CvP Initialization in Intel® Arria® 10
3. Understanding the Design Steps for CvP Initialization in Intel® Arria® 10
4. CvP Driver and Registers
5. Partial Reconfiguration over PCI Express in Intel® Arria® 10
6. Understanding Design Steps for PR over PCI Express in Intel® Arria® 10
7. Document Revision History for the Intel® Arria® 10 CvP Initialization and Partial Reconfiguration over PCI Express* User Guide
4.3.1. Altera-defined Vendor Specific Capability Header Register
4.3.2. Altera-defined Vendor Specific Header Register
4.3.3. Altera Marker Register
4.3.4. CvP Status Register
4.3.5. CvP Mode Control Register
4.3.6. CvP Data Registers
4.3.7. CvP Programming Control Register
4.3.8. Uncorrectable Internal Error Status Register
4.3.9. Uncorrectable Internal Error Mask Register
4.3.10. Correctable Internal Error Status Register
4.3.11. Correctable Internal Error Mask Register
Visible to Intel only — GUID: nik1412546939101
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4.3.2. Altera-defined Vendor Specific Header Register
Bits | Name | Reset Value | Access | Description |
---|---|---|---|---|
[15:0] | VSEC ID | 0x1172 | RO | A user configurable VSEC ID. |
[19:16] | VSEC Revision | 0 | RO | A user configurable VSEC revision. |
[31:20] | VSEC Length | 0x044 | RO | Total length of this structure in bytes. |