Intel® Quartus® Prime Pro Edition User Guide: Partial Reconfiguration

ID 683834
Date 10/04/2021
Public

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2.3. Partial Reconfiguration Controller Intel® Arria® 10 /Cyclone 10 FPGA IP

The Partial Reconfiguration Controller Intel® Arria® 10/Cyclone 10 FPGA IP provides a standard interface to the partial reconfiguration functionality in the PR control block. Use this IP core to avoid manually instantiating a PR control block interface. The Partial Reconfiguration Controller Intel® Arria® 10/Cyclone 10 FPGA IP supports Intel® Arria® 10 and Intel® Cyclone® 10 GX PR designs with a maximum clock frequency of 100MHz.
Figure 42. Partial Reconfiguration Controller Intel® Arria® 10/Cyclone 10 FPGA IP

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