Visible to Intel only — GUID: mwh1410384485353
Ixiasoft
Visible to Intel only — GUID: mwh1410384485353
Ixiasoft
3.4. Step 2: Configure the Signal Tap Logic Analyzer
You must configure the Signal Tap logic analyzer before you can capture and analyze data. You can configure instances of the Signal Tap logic analyzer by specifying options in the Signal Tap Signal Configuration pane.
When you use the available Signal Tap templates to create a new Signal Tap instance, the template specifies many of the initial option values automatically.
Basic configuration of the Signal Tap logic analyzer includes specifying values for the following options:
- Preserving Signals for Monitoring and Debugging
- Specifying the Clock, Sample Depth, and RAM Type
- Specifying the Buffer Acquisition Mode
- Adding Signals to the Signal Tap Logic Analyzer
- Defining Trigger Conditions
- Specifying Pipeline Settings
- Filtering Relevant Samples
- Managing Multiple Signal Tap Configurations
Section Content
Preserving Signals for Monitoring and Debugging
Preventing Changes that Require Full Recompilation
Specifying the Clock, Sample Depth, and RAM Type
Specifying the Buffer Acquisition Mode
Adding Signals to the Signal Tap Logic Analyzer
Defining Trigger Conditions
Specifying Pipeline Settings
Filtering Relevant Samples
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